Daniele Ielmini

Contact

Prof. Dr. Daniele Ielmini

Dipartimento di Elettronica, Informazione e Bioingegneria

Politecnico di Milano

piazza Leonardo da Vinci 32, 20133 Milano, Italy

Telephone: + 39 02 23996120

E mail: daniele.ielmini@polimi.it

Website

Research Field and Activities

non-volatile memory technologies.
neuromorphic computing.
design of devices and circuits for artificial intelligence applications.
aiming to mimic biological neural systems.

Short Biography

Daniele Ielmini is a distinguished academic in the field of electronics and semiconductor devices. He earned his Laurea (cum laude) and Ph.D. in Nuclear Engineering from Politecnico di Milano in 1995 and 2000, respectively. Throughout his career, Prof. Ielmini has held visiting positions at renowned institutions, including Intel Corporation and Stanford University in 2006, and the University of Illinois at Urbana-Champaign in 2010.

His research primarily focuses on non-volatile memory technologies, such as phase change memory (PCM), resistive switching memory (RRAM), and spin-transfer torque magnetic memory (STT-MRAM). In 2016, he co-edited the book “Resistive Switching – From Fundamental Redox Processes to Device Applications” for Wiley-VCH. Prof. Ielmini has contributed over 300 papers to international journals and conferences and holds eight patents.

His work has garnered significant recognition, with more than 10,000 citations and an H-index of 69 as of September 2023. Prof. Ielmini has served on technical subcommittees for several international conferences, including IEEE-IEDM, IEEE-IRPS, IEEE-SISC, INFOS, and IEEE-ISCAS. He is also an Associate Editor for IEEE Transactions on Nanotechnology and Semiconductor Science and Technology (IOP). His accolades include the Intel Outstanding Researcher Award in 2013, the ERC Consolidator Grant in 2014, and the IEEE-EDS Paul Rappaport Award in 2015. Prof. Ielmini is a Fellow of the IEEE.

References / Publications

D. Ielmini and H.-S. P. Wong, “In-memory computing with resistive switching devices,” Nature Electronics, vol. 1, no. 6, pp. 333-343, 2018. DOI: 10.1038/s41586-018-0140-5.
D. Ielmini, “Resistive switching memories based on metal oxides: mechanisms, reliability and scaling,” Semiconductor Science and Technology, vol. 31, no. 6, 063002, 2016. DOI: 10.1088/0268-1242/31/6/063002.
S. Raoux, W. Wełnic, and D. Ielmini, “Phase change materials and their application to nonvolatile memories,” Chemical Reviews, vol. 110, no. 1, pp. 240-267, 2010. DOI: 10.1021/cr900227z.
D. Ielmini and Y. Zhang, “Analytical model for subthreshold conduction and threshold switching in chalcogenide-based memory devices,” Journal of Applied Physics, vol. 102, no. 5, 054517, 2007. DOI: 10.1063/1.2772006.
M. Lanza, H.-S. P. Wong, E. Pop, D. Ielmini, D. Strukov, B. C. Regan, L. Larcher, J.-J. Yang, M. Goux, B. Y. Cho, Y. Chai, R. Li, A. Xia, M. S. J. Marshall, S. Menzel, A. A. Ionescu, L. Chen, “Recommended methods to study resistive switching devices,” Advanced Electronic Materials, vol. 5, no. 1, 1800143, 2019. DOI: 10.1002/aelm.201800143.
D. Ielmini and S. Ambrogio, “Emerging neuromorphic devices,” Nanotechnology, vol. 31, no. 9, 092001, 2020. DOI: 10.1088/1361-6528/ab7132.
D. Ielmini, S. Balatti, S. Ambrogio, and Z. Wang, “True random number generation by variability of resistive switching in oxide-based devices,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 5, no. 2, pp. 214-221, 2015. DOI: 10.1109/JETCAS.2015.2440307.
D. Ielmini, S. Balatti, S. Ambrogio, Z. Wang, S. Sills, A. Calderoni, and N. Ramaswamy, “Understanding pulsed-cycling variability and endurance in HfOx RRAM,” 2015 IEEE International Reliability Physics Symposium Proceedings, pp. 5B.3.1-5B.3.6, 2015. DOI: 10.1109/IRPS.2015.7117324.
D. Ielmini, S. Ambrogio, S. Balatti, and Z. Wang, “Neuromorphic computing with hybrid memristive/CMOS synapses for real-time learning,” 2016 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1386-1389, 2016. DOI: 10.1109/ISCAS.2016.7527410.
D. Ielmini and V. Milo, “Brain-inspired memristive neural networks for unsupervised learning,” in Handbook of Memristor Networks, 2019, pp. 495-525. DOI: 10.1007/978-3-030-06108-7_20.