Technische Universität Dresden

Contact

Prof. Bernabé Linares-Barranco

Instituto de Microelectrónica de Sevilla (IMSE-CNM)
CSIC and Universidad de Sevilla

Email: bernabe@imse-cnm.csic.es

Research Field and Activities

  • Neuromorphic Engineering
  • Analog and Mixed-Signal VLSI Design
  • Memristive Devices & Circuits
  • Machine Learning Hardware Acceleration

Short Biography

 Bernabé Linares-Barranco is a distinguished researcher in neuromorphic engineering and nanoelectronics. He earned his B.S. in Electronic Physics in 1986 and an M.S. in Microelectronics in 1987. He completed his Ph.D. in high-frequency OTA-C oscillator design in 1990.

Since 1991, Dr. Linares-Barranco has been a Tenured Scientist at the Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC) in Spain. His research focuses on analog and mixed-signal VLSI design, neuromorphic systems, spiking neural networks, and memristive devices.

He has contributed significantly to the development of dynamic vision sensors and has co-founded two startups, Prophesee SA and GrAI-Matter-Labs SAS, both specializing in neuromorphic hardware solutions. Dr. Linares-Barranco is recognized for his influential publications and advancements in brain-inspired computing architectures.

Publications

  • F. Faramarzi, B. Linares-Barranco, and T. Serrano-Gotarredona, “A 128×128 Electronically Multi-Foveated Dynamic Vision Sensor with Real-Time Resolution Reconfiguration,” IEEE Access, vol. 12, pp. 192656–192671, 2024. DOI: 10.1109/ACCESS.2024.3519035.
  • M. Velazquez-Lopez, B. Linares-Barranco, J. Lee, H. Erfanijazi, A. Patiño-Saucedo, M. Sifalakis, F. Catthoor, and K. Myny, “A tunable multi-timescale Indium-Gallium-Zinc-Oxide Thin-Film Transistor neuron towards hybrid solutions for spiking neuromorphic applications,” Nature Communications Engineering, vol. 3, no. 102, 2024. DOI: 10.1038/s44172-024-00248-7.
  • R. Fiorelli, M. Rajabali, R. Mendez, A. Kumar, A. Livitenko, T. Serrano-Gotarredona, F. Moradi, J. Akerman, B. Linares-Barranco, and E. Peralias, “Spin Hall Nano-Oscillator Empirical Electrical Model for Optimal On-chip Detector Design,” IEEE Transactions on Electron Devices, vol. 71, no. 8, pp. 4920–4925, Aug. 2024. DOI: 10.1109/TED.2024.10555894.
  • O. Maher, M. Jiménez, C. Delacour, J. Núñez, M. J. Avedillo, B. Linares-Barranco, A. Todri-Sanial, G. Indiveri, and S. Karg, “A CMOS-compatible oscillation-based VO₂ Ising machine solver,” Nature Communications, vol. 15, no. 3324, 2024. DOI: 10.1038/s41467-024-33204-9.
  • H. Erfanijazi, L. A. Camuñas-Mesa, E. Vianello, T. Serrano-Gotarredona, and B. Linares-Barranco, “A Fully Digital Relaxation-Aware Analog Programming Technique for HfOx RRAM Arrays,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 8, pp. 1549–7747, Aug. 2024. DOI: 10.1109/TCSII.2024.10454578.
  • S. Yang, H. Wang, Y. Pang, M. Rahimi Azghadi, and B. Linares-Barranco, “NADOL: Neuromorphic Architecture for Spike-Driven Online Learning by Dendrites,” IEEE Transactions on Biomedical Circuits and Systems, vol. 18, no. 1, pp. 186–199, Feb. 2024. DOI: 10.1109/TBCAS.2024.10501045.